The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
In a system on a chip (SOC), one or more master components communicate with one or more slave components located on the same SOC or a different SOC. The master components include, but are not limited to, a processor and/or a direct memory access (DMA) controller. The slave components include, but are not limited to, memory such as dynamic random access memory (DRAM) and/or static RAM (SRAM). The master components communicate with the slave components via switching fabric. For example, the master components initiate read and write transactions with the slave components via the switching fabric.
In intra-chip applications (i.e., when a master component communicates with one or more slave components on the same SOC), each slave component corresponds to a different address space. Accordingly, the SOC may implement memory-mapped addressing for intra-chip communication. In other words, transactions with the slave components are routed according to different memory-mapped addresses corresponding to respective ones of the slave components. Conversely, in inter-chip applications (i.e., when a master component communicates with one or more slave components on the same SOC and with one or more slave components on a different SOC), a slave component on one SOC may have the same address space as a slave component on a different SOC.